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ACK! dAck! 2.0 Bedienungsanleitung Seite 3

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Philips Semiconductors
ISP1581
USB 2.0 HS interface device
9397 750 07648
© Philips Electronics N.V. 2000. All rights reserved.
Objective specification Rev. 02 — 23 October 2000 3 of 73
5. Block diagram
The direction of pins DREQ, DACK, DIOR and DIOW is determined by bit MASTER (DMA Hardware register) and bit ATA_MODE (DMA Configuration register).
Fig 1. Block diagram.
MGT234
16
4
1.5
kΩ
12.2 kΩ
(±0.1%)
ISP1581
USB 2.0
TRANSCEIVER
10
8
7
3.3 V
RESET
RREF
43, 23
VOLTAGE
REGULATORS
POWER-ON
RESET
MEMORY
MANAGEMENT
UNIT
INTEGRATED
RAM
(8 KBYTE)
MICRO
CONTROLLER
INTERFACE
DMA
INTERFACE
MICRO-
CONTROLLER
HANDLER
DMA
HANDLER
DMA
REGISTERS
12 MHz
XTAL2XTAL1
to/from USB
40× PLL
OSCILLATOR
BIT CLOCK
RECOVERY
SYSTEM
CONTROLLER
PHILIPS
SIE
2, 37,
43, 64
SoftConnect
18, 17,
19, 20, 21
12, 13,
14, 15
40, 41,
44 to 57
READY
*
28
INT
internal
reset
analog
supply
3.3 V
DATA0 to DATA15
MODE0
*
, MODE1
22
19
22
20, 9
16
BUS_CONF
*
8
38, 39, 30 to 35
25, 29, 26, 27
AD0 to AD7
DREQ, DACK,
DIOR, DIOW
CS0, CS1,
DA0
*
, DA1
*
, DA2
V
CC(5.0)
digital
supply
3.3 V
5 V
60 59
INTRQ
IORDY
*
*
Denotes shared pin usage
RPU
5
D−
6
D+
V
reg(3.3)
24, 58
V
CC(3.3)
63
SUSPEND
62
WAKEUP
AGND
2
5 4
2 2
1, 36, 42, 61
DGND
4
4
CS, ALE/A0, (R/W)/RD,
DS/WR
11
EOT
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